Tabajara A601 – version 1.01

 

 This is a guide to make a homebrew A601 without the RTC circuit.

 

 Important notice: do it at your risk! I am not responsible for damage to your Amiga, the hack itself or broken marriages.

 

 This hack add 1 MB of Chip RAM to your A600, regardless of what size SIMM you add, even 128Mb ones.

 

 I will not provide a diagram or a printed circuit board. Make this hack at your full responsibility and own risk!

 

 

72 pin Fast Page Mode SIMM 256k/512k/1M/2M/4M/8M x 32/36 bit

 

Pin

Assign

Pin

Assign

Pin

Assign

Pin

Assign

Pin

Assign

Pin

Assign

Pin

Assign

Pin

Assign

1

GND

10

Vcc

19

A10

28

A7

37

MP1

46

N/C

55

DQ11

64

DQ31

2

DQ0

11

N/C

20

DQ4

29

N/C

38

MP3

47

-WE

56

DQ27

65

DQ15

3

DQ16

12

A0

21

DQ20

30

Vcc

39

GND

48

N/C

57

DQ12

66

N/C

4

DQ1

13

A1

22

DQ5

31

A8

40

-CAS0

49

DQ8

58

DQ28

67

PD1

5

DQ17

14

A2

23

DQ21

32

A9

41

-CAS2

50

DQ24

59

Vcc

68

PD2

6

DQ2

15

A3

24

DQ6

33

-RAS3

42

-CAS3

51

DQ9

60

DQ29

69

PD3

7

DQ18

16

A4

25

DQ22

34

-RAS2

43

-CAS1

52

DQ25

61

DQ13

70

PD4

8

DQ3

17

A5

26

DQ7

35

MP2

44

-RAS0

53

DQ10

62

DQ30

71

N/C

9

DQ19

18

A6

27

DQ23

36

MP0

45

-RAS1

54

DQ26

63

DQ14

72

GND

 

 

Notes:

MP0, MP1, MP2, MP3 are N/C on all x32 bit modules

A9 is a N/C on 256k and 512k modules

A10 is a N/C on 256k, 512k, 1M and 4M modules

RAS1/RAS3 are N/C on 256k, 1M and 4M modules

 

Trapdoor

SIMM (2 & 8Mb)

DRD0-DRD15

DQ0-DQ15

MA0-MA8

A0-A8

CASL1

-CAS0

CASU1

-CAS1

RAS0

-RAS0

RAS1

-RAS1

WE

-WE

+5V

Vcc (10, 30, 59)

GND

Gnd (1, 39, 72)

 

Trapdoor

SIMM (1 & 4Mb)

DRD0-DRD15

DQ0-DQ15

DRD0-DRD15

DQ16-DQ31

MA0-MA8

A0-A8

CASL1

-CAS0 + -CAS2

CASU1

-CAS1 + -CAS3

RAS0

-RAS0

RAS1

-RAS2

WE

-WE

+5V

Vcc (10, 30, 59)

GND

Gnd (1, 39,72)

 

A600 Trapdoor

Pin

Function

Pin

Function

Pin

Function

Pin

Function

Pin

Function

Pin

Function

Pin

Function

Pin

Function

1

VCC

11

DRD6

21

GND

31

DRA8

41

RGA8*

51

D2*

61

NET_CS*

71

IOR*

2

VCC

12

DRD7

22

GND

32

DRA9

42

RGA7*

52

D3*

62

Sp_CS*

72

IOW*

3

GND

13

DRD8

23

DRA0

33

CASU(0)*

43

RGA6*

53

D4*

63

INT2*

73

RTC_CS*

4

GND

14

DRD9

24

DRA1

34

CASL(1)

44

RGA5*

54

D5*

64

INT6*

74

Sense*

5

DRD0

15

DRD10

25

DRA2

35

CASL(0)*

45

RGA4*

55

D6*

65

LEFT*

75

GND**

6

DRD1

16

DRD11

26

DRA3

36

CASU(1)

46

RGA3*

56

D7*

66

RIGHT*

76

VCC

7

DRD2

17

DRD12

27

DRA4

37

RAS0

47

RGA2*

57

A1*

67

14.3 MHz

77

GND

8

DRD3

18

DRD13

28

DRA5

38

RAS1

48

RGA1*

58

A2*

68

TEST*

78

GND

9

DRD4

19

DRD14

29

DRA6

39

WE

49

D0*

59

A3*

69

CCK*

79

+12V*

10

DRD5

20

DRD15

30

DRA7

40

ROE*

50

D1*

60

A4*

70

RESET*

80

-12V*

 

*Pins not used in this hack.

**Pin 75 is grounded via one 470W resistor (low wattage).

 

 The connector could be made from a PCI slot “taked” from a PC (finally something good to do with one ;-) ). Count 40 (80) pins and cut (in the side with all pins, obviously). Or buy new Digikey (1-145154-2) or Farnell (1144437) PCI slot.

 

 If you want to put the SIMM in a SIMM socket, scavenge one from the same old-dead pc or buy Digikey (5822134-3-ND) or Farnell (1101362) angled SIMM socket.

 

Note: use one 10~47μF capacitor in each +5V wire to decouple the lines (avoid fluctuations). Common capacitors are not needed, if the SIMM have them.

 

When using 4 and 16Mb simms for A600 chipram, you have to connect databus together for 16bit mode: D0 to D16, D1 to D17, ..., D15 to D31! Or it will not work.

 

 The printed circuit board (for those who wants to make one), must be dual layer.  My best wishes to people who want to make his/her own board! I just solder a bit of board to provide support to the memory SIMM and do the rest with wire. Ugly as hell, but works!

 

 

 

 

 

 Pin descriptions:

VCC: +5V

GND: GND

N/C: not connected

DRD: DRAM Data Bus

DRA: DRAM Address Bus

CAS: DRAM Column Address Strobe*

RAS: DRAM Row Address Strobe

WE: DRAM Write Enable

ROE: DRAM Output Enable

RGA: Custom Chip Register Address Bus

Dx: CPU Data Bus

Ax: CPU Address Bus

NET_CS: I/O select (Gayle pin 14)

Spare_CS (Sp_CS): spare I/O select  (Gayle pin 15)

INT2 e INT6: Interrupt Request

LEFT & RIGHT: directly connected to Paula audio channels

14,3MHz: system clock

CCK: Color Clock (3.58 MHz)

RESET**: SYSTEM RESET

TEST: Special Function, probably equivalent to some TP1 pin from A1200.

IOR: I/O Read RTC

IOW: I/O Write RTC

RTC_CS: RTC Chip Select

Sense ???

 

ATENTION: only the CAS(1) pins are utilized! The CAS(0) are only used in the INTERNAL memory of A600.

 

** This is the “external” RESET pin from A600. Not tested by me.

 

 

 Thanks to:

 

 Vitaly Grebennik (author of the original hack)
 LordVader/nedoPC (Russian translation help)
 Dieter Marno (for the help in schematics)

 Nivardo Cavalcante (for the pinouts of Amiga 600)

 Ian Stedman (for useful suggestions)

 To everybody who have encourage me to keep going with this hack!

 

 Rogério Kauer

January 2008